8-line to 1-line digital multiplexer (data selector) integrated circuit. It selects one bit of data from eight possible input sources and routes it to a single output based on a 3-bit binary code - Function: 8:1 Multiplexer / Data Selector. Logic Family: Standard TTL (Transistor-Transistor Logic). Package: 16-pin PDIP (Plastic Dual In-line Package). Operating Voltage ( ): Typically (range of to ). Outputs: Provides both a true output ( ) and a complementary output ( or ). Strobe/Enable ( or ): An active-low input that must be at a low logic level to enable the device; if high, the output is forced low and is forced high. ESI Ciudad Real ESI Ciudad Real +8 Pin Configuration (DIP-16) Pin Name Description Pin Name Description 1 Data Input 3 16 Supply Voltage ( ) 2 Data Input 2 15 Data Input 4 3 Data Input 1 14 Data Input 5 4 Data Input 0 13 Data Input 6 5 Multiplexer Output 12 Data Input 7 6 Complementary Output 11 (A) Select Input (LSB) 7 (G) Strobe/Enable (Active Low) 10 (B) Select Input 8 GND Ground ( ) 9 (C) Select Input (MSB)