The LP2995MX linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDRSDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995MX also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DDR DIMMS.Features:Low output voltage offsetWorks with +5v, +3.3v and 2.5v railsSource and sink currentLow external component countNo external resistors requiredLinear topologyApplications:DDR Termination VoltageSSTL-2SSTL-3Datasheet Available:National LP2995MXSOIC 8 package. Manufactured by National.A20264S
