Sheldon TanCambridge University PressEdition: Illustrated, 11/29/2012EAN 9781107411548, ISBN10: 1107411548Paperback, 260 pages, 24.4 x 17 x 1.5 cmLanguage: EnglishModel order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.List of figuresList of tablesPreface1. Introduction2. Projection-based model order reduction algorithms3. Truncated balanced realization methods for model order reduction4. Passive balanced truncation of linear systems in descriptor form5. Passive hierarchical model order reduction6. Terminal reduction of linear dynamic circuits7. Vector potential equivalent circuit for inductance modeling8. Structure-preserving model order reduction9. Block structure-preserving reduction for RLCK circuits10. Model optimization and passivity enforcement11. General multi-port circuit realization12. Model order reduction for multi-terminal linear dynamic circuits13. Passive modeling by signal waveform shapingReferencesIndex.
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