The TS128MFB72V6J-T is a 128M x 72bits DDR2-667 Fully Buffered DIMM. The TS128MFB72V6J-T consists of 18pcs 64Mx8bits DDR2 SDRAMs in 60 ball FBGA package, 1 pcs AMB IC, and a 2048 bits serial EEPROM on a 240-pin printed circuit board. The TS128MFB72V6J-T is a 240pin fully buffered dual in-line memory module. The Advanced Memory Buffer also allows buffering of memory traffic to support large memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing, refresh, scrubbing, sparing, configuration access, and power management. The Advanced Memory Buffer interface is responsible for handling channel and memory requests to and from the local DIMM and for forwarding requests to other DIMMs on the memory channel. Fully Buffered DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface.
